COMBINATIONAL LOGIC CIRCUITS
Circuit Families and Its Comparison
Low Power Logic Design
Sequencing Static Circuits
Circuit Design of Latches and Flip Flops
Static Sequencing Element Methodology
Sequencing Dynamic Circuits
Synchronizers - VLSI Design
SEQUENTIAL LOGIC CIRCUITS
Circuit Families and Its Comparison
Low Power Logic Design
Sequencing Static Circuits
Circuit Design of Latches and Flip Flops
Static Sequencing Element Methodology
Sequencing Dynamic Circuits
Synchronizers - VLSI Design
CMOS TECHNOLOGY
A Brief History of CMOS Technology
MOS Transistor
Ideal I-V characteristics of MOS Transistor
CV characteristics
Non ideal I-V effects
DC Transfer Characteristics of CMOS Inverter
CMOS Technologies
BiCMOS Technology Fabrication
CMOS Layout Design Rules
CMOS Process Enhancements
Technology Related CAD Issues - CMOS Technology
Manufacturing Issues - CMOS Technology
CIRCUIT CHARACTERIZATION AND SIMULATION
Delay Estimation
Logical Effort
Transistor Sizing
Power Dissipation - VLSI Design
Interconnect - VLSI Design
Design Margin - VLSI Design
Reliability - VLSI Design
Scaling - VLSI Design
Device Models - VLSI Design
COMBINATIONAL AND SEQUENTIAL CIRCUIT DESIGN
Low Power Logic Design
Sequencing Static Circuits
Circuit Design of Latches and Flip Flops
Static Sequencing Element Methodology
Sequencing Dynamic Circuits
Synchronizers - VLSI Design
CMOS TESTING
Testers and Test Programs
Text Fixtures
Logic Verification
Silicon Debug Principal
Manufacturing Test
Designs For Testability
Boundary Scan
SPECIFICATION USING VERILOG HDL
Specification Using Verilog HDL: Basic Concepts
Identifiers - verilog code
Gate Primitives
Gate Delays - Verilog HDL
Operators - Verilog HDL
Timing Controls - Verilog HDL
Procedural Assignments Conditional Statements
Data Flow and RTL
Structural Gate Level Switch Level Modeling
Design Hierarchies - VLSI Design
